The 5G Senior Embedded Software Engineer will be responsible for the selection and integration of a commercial 5G UE modem chipset on a multi-circuit board system for an eMBB application.
- Must leverage the multi-core SoC structure and develop drivers for external interfaces, which will handle all tasks of boot, configuration, interaction with the RF front-end, and data path.
- Must have an understanding of 3GPP 5G standards and how they manifest in the UEs behavior on RF bands, UE category, modes and interfaces, as well as the impact on thermal/EMI/EMC aspects. May have to interact directly with the chipset vendor or integrator company teams. The selected modem chipsets must be integrated onto OpenVPX circuit boards in a flexible design to provide a roadmap for accommodating future 3GPP releases and expanded on-board features.
- Must be a solid team-player working with a wide-skilled team of mechanical/RF/baseband/system and wireless standards engineers who will develop both the RAN and the mobile side of the system. The candidate will be the lead embedded SW engineer of the team driving many of the system design approaches of the mobile unit.
- Must be a self-motivated, independent thinker, proactive, and creatively solve problems.
- The position is ideal for an experienced embedded 5G/4G embedded SW designer who wants to relocate to the vibrant New York City metro area, take a leadership role, and have an impact in the market delivering custom solutions, and drive a new generation of 5G products for the government sector.
- Requires 5 to 8 years with BS/BA or 3 to 5 years with MS/MA or 0 to 2 years with Ph.D.
- Must have hands-on experience with embedded Software design of commercial cellular UE chipsets integration on 5G and/or 4G. Integration of baseband SoC UE chipsets from the major 5G manufacturers with external circuit board systems and drivers and prior experience with 5G development boards is expected. Must provide seamless integration of data path and interfaces with all RF control and I/O functions. Exposure to RF chain design and experience with cellular testing tools is a plus.
- Must be able to interpret current 5G SoC UE specifications and make recommendations on design approaches for current product and its roadmap. Must have testing and lab experience to make assessments troubleshoot, and analyze test data for performance and interoperability aspects with RAN nodes.
- Must be familiar with Integration on OpenVPX circuit boards with customized interfaces. Expected to interact with a circuit designer for board development for operation in hardened environments and design for very low power and size.
- Must have working experience in SoC platform RTOS and multi-core development environments. Linux/Android/OS Exposure required.